The present invention relates generally to semiconductor devices, and, more particularly, to a semiconductor chip having bonding pads which are directly bonded to respective leads.
As semiconductor technology continues to rapidly evolve towards multi-functional semiconductor devices with continuously increasing integration levels and decreasing feature size, a need has arisen for miniature, multi-pin-compatible semiconductor packages to accommodate these devices. Several different types of semiconductor packages have been developed to meet this need, the most popular of which are TQFPs (Thin Quad Flat Packages), TSOPs (Thin Small Outline Packages), FCPs (Flip Chip Packages), and TABPs (Tape Automated Bonding Packages).
In order to facilitate easy attachment of a semiconductor package of any of the above-enumerated types to a printed circuit or wiring board, various tape automated bonding (TAB) techniques have been developed.
In a first prior art TAB technique, depicted in FIGS. 1A and 1B, metal bumps 1 are formed on electrode terminals or chip bonding pads 2 provided on a semiconductor I.C. chip 10, and leads 3 of a lead frame (not shown) are bonded to the chip bonding pads 2. Each of the leads 3 may be comprised of a segment of TAB tape.
In a second prior art TAB technique, depicted in FIGS. 2A and 2B, the metal bumps 1 are formed on distal end portions of the leads 3, and then bonded to the chip bonding pads 2.
In a third prior art TAB technique, depicted in FIGS. 3A and 3B, the distal end portions of the leads 3 are formed in the shape of mesas or bumps 4 which are then bonded to the chip bonding pads 2. This technique is commonly referred to as the mesa bump bonding technique.
In a fourth prior art TAB technique, depicted in FIGS. 4A-4C, a gold (Au) ball 5 is formed on each chip bonding pad 2 by use of a ball-forming device 6, and the leads 3 are then bonded to the gold balls 5. Alternatively, the gold balls 5 can be formed on the distal end portions of the leads 3.
In accordance with all of the above-described prior art TAB techniques, the step of bonding the leads 3 to the chip bonding pads 2 is performed after a bump or ball is formed on the leads or the pads. With reference now to FIG. 5, the chip bonding pads 2 are located a prescribed distance away from the peripheral edge 11 of the chip 10, and under a passivation layer (not shown). Accordingly, to facilitate the bonding step, it is necessary that the bump or ball be thicker than the passivation layer, which unduly increases the thickness of the overall device. Moreover, the above-described prior art TAB techniques are unduly complex and expensive, in that each of them entails an additional process step to form the bump or ball.
Thus, as is evident from the foregoing, there presently exists a need for a semiconductor device which overcomes the disadvantages and shortcomings of the presently available semiconductor devices. The present invention fulfills this need.